Assembler

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Assemblerkode er en tekst-fil der skriver direkte i de symbolske maskinkoder.

Der er 34 forskellige instruktioner i en PIC, som det kan ses i tabellen fra databladet:

PIC16F684 INSTRUCTION SET

Mnemonic, Operands Description Cycles 14-Bit Opcode Status Affected Notes
BYTE-ORIENTED FILE REGISTER OPERATIONS
ADDWF f, d

ANDWF f, d

CLRF f

CLRW -

COMF f, d

DECF f, d

DECFSZ f, d

INCF f, d

INCFSZ f, d

IORWF f, d

MOVF f, d

MOVWF f

NOP -

RLF f, d

RRF f, d

SUBWF f, d

SWAPF f, d

XORWF f, d

Add W and f

AND W with f

Clear f

Clear W

Complement f

Decrement f

Decrement f, Skip if 0

Increment f

Increment f, Skip if 0

Inclusive OR W with f

Move f

Move W to f

No Operation

Rotate Left f through Carry

Rotate Right f through Carry

Subtract W from f

Swap nibbles in f

Exclusive OR W with f

1

1

1

1

1

1

1(2)

1

1(2)

1

1

1

1

1

1

1

1

1

00 0111 dfff ffff

00 0101 dfff ffff

00 0001 lfff ffff

00 0001 0xxx xxxx

00 1001 dfff ffff

00 0011 dfff ffff

00 1011 dfff ffff

00 1010 dfff ffff

00 1111 dfff ffff

00 0100 dfff ffff

00 1000 dfff ffff

00 0000 lfff ffff

00 0000 0xx0 0000

00 1101 dfff ffff

00 1100 dfff ffff

00 0010 dfff ffff

00 1110 dfff ffff

00 0110 dfff ffff

C, DC, Z

Z

Z

Z

Z

Z


Z


Z

Z



C

C

C, DC, Z


Z

1, 2

1, 2

2


1, 2

1, 2

1, 2, 3

1, 2

1, 2, 3

1, 2

1, 2



1, 2

1, 2

1, 2

1, 2

1, 2

BIT-ORIENTED FILE REGISTER OPERATIONS
BCF f, b

BSF f, b

BTFSC f, b

BTFSS f, b

Bit Clear f

Bit Set f

Bit Test f, Skip if Clear

Bit Test f, Skip if Set

1

1

1 (2)

1 (2)

01 00bb bfff ffff

01 01bb bfff ffff

01 10bb bfff ffff

01 11bb bfff ffff

1, 2

1, 2

3

3

LITERAL AND CONTROL OPERATIONS
ADDLW k

ANDLW k

CALL k

CLRWDT –

GOTO k

IORLW k

MOVLW k

RETFIE –

RETLW k

RETURN –

SLEEP –

SUBLW k

XORLW k

Add literal and W

AND literal with W

Call Subroutine

Clear Watchdog Timer

Go to address

Inclusive OR literal with W

Move literal to W

Return from interrupt

Return with literal in W

Return from Subroutine

Go into Standby mode

Subtract W from literal

Exclusive OR literal with W

1

1

2

1

2

1

1

2

2

2

1

1

1

11 111x kkkk kkkk

11 1001 kkkk kkkk

10 0kkk kkkk kkkk

00 0000 0110 0100

10 1kkk kkkk kkkk

11 1000 kkkk kkkk

11 00xx kkkk kkkk

00 0000 0000 1001

11 01xx kkkk kkkk

00 0000 0000 1000

00 0000 0110 0011

11 110x kkkk kkkk

11 1010 kkkk kkkk

C, DC, Z

Z


TO, PD


Z





TO, PD

C, DC, Z

Z

Note 1: When an I/O register is modified as a function of itself (e.g., MOVF GPIO, 1), the value used will be that value present on the pins themselves. For example, if the data latch is ‘1’ for a pin configured as input and is driven low by an external device, the data will be written back with a ‘0’.
Note 2: If this instruction is executed on the TMR0 register (and where applicable, d = 1), the prescaler will be cleared if assigned to the Timer0 module.
Note 3: If the Program Counter (PC) is modified, or a conditional test is true, the instruction requires two cycles. The second cycle is executed as a NOP.